D. M. Miller: Publications (2000 to 2008)

Books, Contributions to Books

1.            Miller, D. Michael, and Mitchell A. Thornton, Multiple Valued Logic: Concepts and Representations, Morgan & Claypool, 2008.

2.            Yanushkevitch, Svetlana N., D. Michael Miller, Vlad P. Shmerko and Radomir S. Stankovic. Decision Diagram Techniques for Micro- and Nanoelectronic Design, CRC Taylor & Francis, 2006.

3.            Thornton, Mitchell Aaron, Rolf Drechsler and D. Michael Miller. Spectral Techniques in VLSI CAD, Kluwer Academic Publishers, The Netherlands, 2001.

Refereed Journal Publications

1.            Yamashita, Shigeru, Shin-ichi Minato and D. Michael Miller , "DDMF: An efficient decision diagram structure for design verification of quantum circuits under a practical restriction," Proceedings IEICE, to appear December 2008.

1.            Maslov, D., G. W. Dueck, D. M. Miller and C. Negrevergne, "Quantum circuit simplification and level compaction," IEEE Transactions on Computer Aided Design, vol. 27, number 3, pp. 436-444, March 2008. (PDF)

2.            Miller, D.M., D. Y. Feinstein and M.A. Thornton, "QMDD minimization using sifting for variable reordering," Journal of Multiple-Valued Logic and Soft Computing, vol. 13, number 4-6, pp. 537-552, 2007. (PDF)

3.            Maslov, D., G. W. Dueck and D. M. Miller and, "Techniques for the synthesis of reversible Toffoli networks," ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 12, number 4, pp. 42:1 – 42:28, September 2007. (PDF)

4.            Maslov, D., and D. M. Miller, "Comparison of the Cost Metrics through Investigation of the Relation between Optimal NCV and Optimal NCT 3-qubit Reversible Circuits," IET Computers & Digital Techniques, vol. 1, number 2, pp. 98-104, March 2007. (PDF)

5.            Miller, D.M., D. Maslov, and G. Dueck. "Synthesis of Quantum Multiple-Valued Circuits," Journal of Multiple-Valued Logic and Soft Computing, vol. 12, no. 5-6, pp. 431-450, 2006. (PDF)

6.            Maslov, D., G. Dueck, and D. M. Miller. "Synthesis of Toffoli-Fredkin Reversible Networks," IEEE Transactions on Very Large Scale Integration Systems, vol. 13, issue 6, pp. 765-769, June 2005. (PDF)

7.            Maslov, D., G. Dueck, and D. M. Miller, "Toffoli Network Synthesis with Templates," IEEE Transactions on Computer Aided Design vol. 24, issue 6, pp. 807-817, June 2005. (PDF)

8.            Thornton, M. A., and D. M. Miller, "Computation of Discrete Function Chrestenson Spectra Using Cayley Color Graphs," Multiple-Valued Logic – An International Journal: Special Issue on Spectral Techniques, vol. 10, no. 2, pp. 189-202, 2004. (PDF)

 

Refereed Conference Publications

1.            Yamashita, Shigeru, Shin-ichi Minato and D. Michael Miller, "Efficient verification of quantum circuits under a practical restriction," IEEE 8th International Conference on Computer and Information Technology (CIT2008) , Sydney, Australia, pp. 873-879, July, 2008.

2.            Feinstein, David Y., Mitchell A. Thornton and D. Michael Miller, "On the data structure metrics of quantum multiple-valued decision diagrams," Proc. 2008 Int. Symposium on Multiple-Valued Logic, Dallas, Texas, pp. 138-143, May 2008.

3.            Thornton, Mitchell A., David W. Matula, Laura Spenner and D. Michael Miller, "Quantum logic implementation of unary arithmetic operations," Proc. 2008 Int. Symposium on Multiple-Valued Logic, Dallas, Texas, pp. 202-207, May 2008.

4.            Feinstein, David Y., Mitchell A. Thornton and D. Michael Miller, "Partially redundant logic detection using symbolic equivalence checking in reversible and irreversible logic circuits," 2008 Conference on Design and Test Europe, pp. 1378-1381, March, 2008.

5.            Miller, D.M., D.Y. Feinstein and M.A. Thornton, "Variable Reordering and Sifting for QMDD," Proc. 2007 Int. Symposium on Multiple-Valued Logic, Oslo, Norway, May 2007, CD, 7 pages. (PDF)

6.            Miller, D. Michael, Mitchell A. Thornton and David Goodman, "A Decision Diagram Package for Reversible and Quantum Circuit Simulation," Proc. IEEE World Congress on Computational Intelligence, July 2006, CD, 8 pp. (PDF)

7.            Miller, D. Michael and Mitchell A. Thornton, "QMDD: A Decision Diagram Structure for Reversible and Quantum Circuits," Proc. 2006 Int. Symposium on Multiple-Valued Logic, Singapore, May 2006, CD, 6 pp. (PDF)

8.            Maslov, D., D. M. Miller and G. W. Dueck, "Templates for Reversible Logic Synthesis," PACRIM-2005, pp. 609-612, Victoria, Canada, August 2005.

9.            Maslov D., C. Young, D. M. Miller and G. W. Dueck, "Quantum Circuit Simplification using Templates," 2005 Conference on Design and Test Europe (DATE), Munich, Germany, March 2005, pp. 1208-1213. (PDF)

10.        Miller, D.M., G. Dueck, and D. Maslov, "A Synthesis Method for MVL Reversible logic," Proc. 2004 Int. Symposium on Multiple-Valued Logic, Toronto, Canada, May 2004, pp. 74-80.  (PDF)

11.        Maslov, D., G. W. Dueck, and D. M. Miller, "Fredkin/Toffoli Templates for Reversible Logic Synthesis," International Conference on Computer Aided Design (ICCAD), San Jose, CA, November 2003, pp. 256-261.  (PDF)

12.        Maslov, D., G. W. Dueck, and D. M. Miller, "Simplification of Toffoli Networks via Templates", 16th Symposium on Integrated Circuits and System Design, Sao Paulo, Brazil, September 2003, pp. 53-58.  (PDF)

13.        Dueck, G. W., D. Maslov, and D. M. Miller, "Transformation-Based Synthesis of Reversible Logic," IEEE/ACM Design Automation Conference (DAC), Anaheim, CA, June 2-6, 2003, pp. 318-323. (PDF)

14.        Miller, D. M., and R. Drechsler, "Augmented Sifting of Multiple-Valued Decision Diagrams," Proc. 2003 Int. Symposium on Multiple-Valued Logic, Tokyo, Japan, May 2003, pp. 275-382.  (PDF)

15.        Miller, D. M., and G. W. Dueck, "On the Size of Multiple-Valued Decision Diagrams," Proc. 2003 Int. Symposium on Multiple-Valued Logic, Tokyo, Japan, May 2003, pp. 235-240.  

16.        Miller, D. M., "Spectral and Two-Place Decomposition Techniques in Reversible Logic," Midwest Symposium on Circuits and Systems, published on CD-ROM, August 2002.  (PDF)

17.        Norris, C. and D. M. Miller, International Conference on Communications in Computing (CIC 2002).

18.        Thornton, M. A., R. Drechsler, D.M. Miller and W. Townsend, "Computing Walsh, Arithmetic and Reed-Muller Spectral Decision Diagrams Using Graph Transformations," GLVLSI 2002. 

19.        Thornton, M. A., R. Drechsler, and D. M. Miller, "Multi-output Timed Shannon Circuits," ISVLSI 2002.  (PDF)

20.        Miller, D. Michael and Rolf Drechsler, "Further Improvements in Implementing MVDDs," 2002 Int. Symposium on Multiple-Valued Logic, pp. 245-253, May 2002.

21.        Thornton, Mitchell, D. Michael Miller and Whitney Townsend, "Chrestenson Spectrum Computation Using Cayley Color Graphs," 2002 Int. Symposium on Multiple-Valued Logic, pp. 123-128, May 2002.

22.        Costi, C., and D. M. Miller, "A Visualization Framework for VHDL Analysis," Fifth Multi-Conference on Systems, Cybernetics and Informatics: Special Session on Modern Digital System Synthesis, pp. 278-282, Orlando, Fl., July 2001.  (PDF)

23.        Nagata, Y., D. M. Miller and M. Mukaidono, "Logic Synthesis of Controllers for B-Ternary Asynchronous Systems," Proc. 2000 Int. Symposium on Multiple-Valued Logic, pp. 402-407, May 2000.

24.        Dubrova, E., P. Everlee, D. M. Miller and J. C. Muzio, "TOP, An Algorithm for Three-Level Minimization of PLDs," Proc. Design, Automation and Test in Europe Conference, pp. 751, March 2000.

 

Other Publications (e.g., unrefereed journal and conference papers)

1.            Miller, D. Michael, and Mitchell A. Thornton, "QMDD and spectral transformation of binary and multiple-valued functions," Proceedings of the 8th International Workshop on Boolean Problems,  pp. 137-144, September 2008.

2.            Miller, D. Michael, "Decision diagram techniques for reversible and quantum circuits," Proceedings of the 8th International Workshop on Boolean Problems,  pp. 1-15, September 2008.

3.            Goodman, D., D.Y. Feinstein, M.A. Thornton and D.M. Miller. "Quantum logic circuit simulation based on the qmdd data structure," Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), pp. 99-105, May 2007.

4.            Yamashita, S. and D. M. Miller, "Decision Diagram Data Structure to Represent Quantum Circuits," Institute of Electronics, Communications and Communication Engineers, November 2006, 6 pp. (PDF)

5.            Maslov, D., G. W. Dueck, D. M. Miller. Quantum Circuit Simplification and Level Compaction, April 2006. (PDF)

6.            Maslov, D., and D. M. Miller, "Reed-Muller Spectra Based Synthesis of Reversible Circuits Using a Quantum Cost Metric," RM-2005, September 2005.

7.            Dueck, G. W., D. Maslov and D. M. Miller, "Transformation-based Synthesis of Networks of Toffoli/Fredkin Gates," Canadian Conference on Electrical and Computer Engineering, Montreal, May 4-7, 2003 (refereed by abstract). (PDF)

8.            Maslov, Dmitri, Gerhard W. Dueck, and D. Michael Miller, "Templates for Toffoli network synthesis," International Workshop on Logic Synthesis, May 28-30, 2003, pp. 320-326. (PDF)

9.            Dueck, G. W., D. Maslov, and D. M. Miller, "Transformation-based Synthesis of Networks of Toffoli/Fredkin Gates", IEEE Canadian Conference on Electrical and Computer Engineering, Montreal, Quebec, May 2003, (refereed by abstract). (PDF)

10.        Miller, D. M., and G. W. Dueck, "Spectral Techniques for Reversible Logic Synthesis," RM-2003 Workshop, Trier, Germany, March 2003.  (PDF)

11.        Thornton, M. A., D. Michael Miller and R. Drechsler, "Transformations amongst the Walsh, Haar, Arithmetic and Reed-Muller  Spectral Domains," Proc. 4th International Workshop on Applications of Reed-Müller Expansion in Circuit Design (Reed-Müller 2001), pp. 215-225, August 2001.  (PDF)

12.        Norris, C. and D. M. Miller, "Comparing the Performance of IP over Ethernet and IEEE-1394 on a Java Platform," IEEE Pacific Rim Conf. on Communications, Computers and Signal Processing, pp. 481-484, August 2001 (refereed by short abstract). (PDF)